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Optimization of Run Configurations of k-Wave Jobs
Sasák, Tomáš ; Jaroš, Marta (referee) ; Jaroš, Jiří (advisor)
This thesis focuses on scheduling, i.e. correct approximation of configurations used to run k-Wave simulations on supercomputers from the IT4Innovations infrastructure. Especially, for clusters Salomon and Anselm. A single work is composed of a set which contains many simulations. Every simulation is executed by some code from the k-Wave toolbox. To calculate the simulation, it is necesarry to select a suitable configuration, which means the amount of supercomputer resources (number of nodes, i.e. cores), and the duration of the rental. Creation of an ideal configuration is complicated and is even harder for an inexperienced user. The approximation is made based on the empiric data, obtained from multiple executions of different sets of simulations on given clusters. This data is stored and used by a set of approximators, which performs the actual approximation by methods of interpolation and regression. The text describes the implementation of the final scheduler. By experimenting, the most efficient methods for this problem has found out to be Akima spline, PCHIP interpolation and cubic spline. The main contribution of this work is creation of a tool which can find suitable configuration for k-Wave simulation without knowing the code or having lots of experience with its usage.
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x86 Assembler Simulator for Education
Heštera, Andrej ; Semerád, Lukáš (referee) ; Orság, Filip (advisor)
Point of this thesis is gain knowledge base of x86 Instruction Set Architecture and x86 assembly language through analysis. Based on this knowledge, design and implement simulation environment in object oriented programming language Java SE8. This environment will give user option to create code based on conventions and syntax of Netwide Assembler and simulate created code on virtual representation - simulation model, which will imitate behavior of processor implementing instruction set architecture x86. The result of using this environment should be new knowledge for user about basic function of machine code execution and how this execution alters state of processor, without the need to specially compile created code for use in Debugger and having physical system implementing architecture x86.
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Minimization of Counting Automata
Turcel, Matej ; Vojnar, Tomáš (referee) ; Holík, Lukáš (advisor)
Táto práca sa zaoberá redukciou veľkosti tzv. čítačových automatov. Čítačové automaty rozširujú klasické konečné automaty o čítače s obmedzeným rozsahom hodnôt. Umožňujú tým efektívne spracovať napr. regulárne výrazy s opakovaním: a{5,10}. V tejto práci sa zaoberáme reláciou simulácie v čítačových automatoch, pomocou ktorej sme schopní zredukovať ich veľkosť. Opierame sa pritom o klasickú simuláciu v konečných automatoch, ktorú netriviálnym spôsobom rozširujeme na čítačové automaty. Kľúčovým rozdielom je nutnosť simulovať okrem stavov taktiež čítače. Za týmto účelom zavádzame nový koncept parametrizovanej relácie simulácie, a navrhujeme metódy výpočtu tejto relácie a redukcie veľkosti čítačových automatov pomocou nej. Navrhnuté metódy sú tiež implementované a je vyhodnotená ich efektivita.
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Design and processing of teaching practices dash navigation
Bandúr, Juraj ; Vosecký, Slavomír (referee) ; Chlebek, Jiří (advisor)
The diploma thesis deals with concepts of various key tasks for flights operated by device navigation, while these tasks are designed under the requirements of the regulation JAR-FCL 1. The work also includes explanation of the principles of operation of selected radio navigation devices, which are demonstrated in various roles, making these tasks serve well as a possible teaching material for navigation subjects. Part of the work also includes the evaluation of the simulator FlitePro for the purposes of its certification as a training device.
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Optimization of supporting cryptographic operations using hardware
Čurilla, Jakub ; Smékal, David (referee) ; Cíbik, Peter (advisor)
This work deals with the description of FPGA architecture circuits, their structure, VHDL language, FPGA design flow, cryptography and cryptographic operations, and subsequent implementation and realization of support functions for cryptographic operations in VHDL language, their time and performance analysis, and mutual comparison.
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Design and Implementation of a Profiler for ASIPs
Richtarik, Pavel ; Hynek, Jiří (referee) ; Zachariášová, Marcela (advisor)
The major objective of this work is to analyse possibilities of profiling application specific instruction-set processors, to explore some common profiling techniques and to use the collected information to design and implement a new profiling tool suitable for utilization in the processors development and optimization. This bachelor thesis presents requirements on the new profiler and describes its key parts from the design and the implementation perspective.
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Simulation Based Matchmaking Optimisation
Eštvan, Ivan ; Chlubna, Tomáš (referee) ; Milet, Tomáš (advisor)
This bachelor's thesis focuses on designing a working matchmaking system and simulation environment for a First Person Shooter like game and their implementation within Unreal Engine 4. It introduces various types of matchmaking systems used in today's games and explains some basic concepts used in Unreal Engine 4 to implement such environments. Implemented system then takes the input data, with information about players, creates matches by using our own matchmaking and performs a simulation of them, providing the simulation results of created matches for further analysis.
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Audio power amplifier 2 x 500 W
Petrgál, Filip ; Brančík, Lubomír (referee) ; Hruboš, Zdeněk (advisor)
This bachelor’s thesis deals with low frequency power amplifier, distribution, and involvement of important parameters. Furthermore, the second deals with the preamplifiers, power supplies, amplifier circuits protections and other additional modules. Elaboration includes simulated proposals to address preamp, power amplifier output stage as well as protection circuitin PSpice program. Proposes that these modules is shown in the detailed diagramdescribing the components.
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Rigid Body Simulation
Leitner, Denis ; Milet, Tomáš (referee) ; Chlubna, Tomáš (advisor)
This thesis deals with rigid body physics simulation in real time. It describes basic methods for collision detection between convex polyhedra, solving collisions and simulation of rigid body dynamics used in game development. Work also describes design and implementation of rigid body simulator written in C++ using OpenGL for rendering.
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Modeling and Simulation of Mobile working machine Powertrain
Zavadinka, Peter ; Věchet, Stanislav (referee) ; Kriššak,, Peter (advisor)
Táto diplomová práca sa zaoberá vytvorením dynamického modelu mobilného pracovného stroja. Ciežom práce je vytvorenie blokového modelu pohonu štvorkolesového mobilného pracovného stroja. Model hydrostatického prevodu bol dodaný firmou Sauer-Danfoss. Model mobilného pracovného stroja bol vytvorený v programe MATLAB-Simulink. Dalšou časťou práce je výber typu riadenia hydrostatického prevodu a návrh riadiaceho algoritmu hydrostatického prevodu. Výstupom práce je blokový matematicko-fyzikálny model pohonu štvorkolesového mobilného pracovného stroja spolu s riadiacim algoritmom hydrostatického prevodu v prostredí MATLAB-Simulink.
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